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| − | I have always been interested in CPU architecture. In order to understand better how a CPU internally works I decided to design and build my own computer just using discrete logic. For many people this might sound as a lost of time... but some people entertain themselves with sudokus! :)
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| − | ==TH-C01==
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| − | Full details of [[TH-C01]]
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| − | ====Definition====
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| − | * 8 bit ALU
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| − | * 8 bit Data bus
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| − | * 16 bit Address bus (MAX 64k bytes RAM)
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| − | * 8 x 8 bit registers (R0..R7) + (R6+R7 as address pointer)
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| − | * Dedicated Stack Pointer
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| − | * Dedicated PC
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| − | * Interruption control
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| − | * Expected 100 Khz
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| − | * RISC-like architecture with 3 to 5 cycles per operation
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| − |
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| − | ====STATUS====
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| − | * Definition: Finished
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| − | * Design: Final Design
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| − | * Implementation: Early Implementation
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| − | * Tools:
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| − | ** Assembler: Started
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| − |
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| − | ==TH-C02==
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| − | ====Definition====
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| − | * 24 bit ALU
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| − | * 24 bit Data bus
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| − | * 24 bit Address bus
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| − | * RISC architecture
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| − | * Pipelining
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| − |
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| − | ====STATUS====
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| − | * Design:
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| − | * Implementation:
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| − | * Tools:
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| − | ** Assembler
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| − | ** Compiler
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